View ASM3P2854C_4704545.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ASM3P2854C Custom Clock Generator for Fax System
ASM3P2855D, ASM3P2854C realizes all the seventeen
Features
* Generates Custom Clocks for FAX system from an inexpensive 24MHz Crystal * 2x 66.66MHz low EMI (Spread Spectrum) clocks for ASIC1 (System / DDR SDRAM) * 1 x 48MHz for USB1.1 HOST * 2 x 33.33MHz low EMI (Spread Spectrum) clocks for System / DDR SDRAM of ASIC2 and ASIC3 * 1x 25MHz low EMI (Spread Spectrum) clock for LCD, Serial port, and buzzer of ASIC1 * 1x 12MHz for USB PHY (USB2.0) * 1x Programmable clock for printer engine control * One of the four programmable clock outputs selection through two Select Pins * Supply Voltage 3.3V 0.3V * Available in 16L TSSOP, Green package
clocks
required
by
the
various
components
and
subsystems of the FAX system. It uses an inexpensive 24MHz crystal as the input to generate two 66.66MHz low EMI (spread spectrum) clocks used by ASIC1 for system/ DDR SDRAM, two 33.33MHz low EMI (spread spectrum) clocks used by ASIC2 and ASIC3 for system/ DDR SDRAM, a 25MHz low EMI (Spread Spectrum) clock used by ASIC1 for LCD, Serial port, and buzzer, a 48MHz clock used by USB1.1 HOST, and a 12MHz clock used by USB PHY (USB2.0). One of the four Programmable clock (PCLK) frequencies of 24.00448MHz, 21.33732MHz, 21.19962MHz and 20.40464MHz used for Printer Engine control selectable through two Select pins S1 and S2. The accuracy of the synthesized programmable clocks is within 18ppm. The custom clock generator works is with a Supply Voltage for 3.3V. The device is available in a 16L TSSOP Green package, over 0 to +70 temperature range. The output Clocks h ave C C an accuracy of 50ppm.
Product Description
ASM3P2854C is a part of the two chip custom clock generator solution for NEC FAX system. Together with
Block Diagram
VDD
VDD_FOUT
2 PLL 2
66.6MHz SSCLK 33.3MHz SSCLK 25MHz SSCLK
XIN / CLKIN XOUT Crystal (24 MHz) 48MHz PLL 12MHz
PLL S1 S2
PCLK
GND
(c)2010 SCILLC. All rights reserved. MARCH 2010 - Rev. 1
GND_FOUT
Publication Order Number: ASM3P2854/D
ASM3P2854C
Pin Diagram
XIN / CLKIN XOUT VDD VDD_FOUT GND_FOUT GND 48MHz 12MHz
1 2 3 4
16 15 14 13
25MHz SSCLK PCLK S2 66.6MHz SSCLK 66.6MHz SSCLK S1 33.3MHz SSCLK 33.3MHz SSCLK
ASM3P2854C
5 6 7 8 12 11 10 9
Pin Description Pin#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin Name
XIN / CLKIN XOUT VDD VDD_FOUT GND_FOUT GND 48MHz 12MHz 33.3MHz 33.3MHz S1 66.6MHz 66.6MHz S2 PCLK 25MHz
Type
I O P P P P O O O O I O O I O O
Description
Crystal connection or external reference clock input. Crystal connection. If using an external reference, this pin must be left unconnected. Power supply for the core Power supply for the output buffers. Ground connection for the output buffers Ground connection 48MHz Clock Output 12MHz Clock Output 33.3 MHz low EMI Clock Output 33.3 MHz low EMI Clock Output Selection Bit for Programmable Clock. To be Pulled HIGH or LOW suitably. See the PCLK Selection Table for details 66.6 MHz low EMI Clock Output 66.6 MHz low EMI Clock Output Selection Bit for Programmable Clock. To be Pulled HIGH or LOW suitably. See the PCLK Selection Table for details Programmable Clock Output 25 MHz low EMI Clock Output
Rev. 1 | Page 2 of 8 | www.onsemi.com
ASM3P2854C
PCLK Selection Table
S2 0 0 1 1 S1 0 1 0 1 Programmable Clock (MHz) 24.00448 21.33732 21.19962 20.40464
Absolute Maximum Ratings Symbol
VDD, VDD_FOUT TSTG Ts TJ TDV
Parameter
Rating
-0.5 to +4.6 -65 to +125 260 150 2
Unit
V C C C KV
Voltage on any pin with respect to Ground Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
Recommended Operating Conditions Symbol
TA VDD VDD_FOUT
Parameter
Operating Temperature Core Voltage Output Buffer Voltage
Min
0 +3.0 +3.0
Typ
+3.3 +3.3
Max
+70 +3.6 +3.6
Units
C V V
Rev. 1 | Page 3 of 8 | www.onsemi.com
ASM3P2854C
DC Electrical Characteristics Symbol
VIL VIH IIL IIH IXOL IXOH VOL VOH IDD ICC VDD VDD_FOUT tON ZO Input low voltage Input high voltage Input low current Input high current XOUT output low current (VXOL@ 0.4V, VDD = 3.3V) XOUT output high current (VXOH@ 2.5V, VDD = 3.3V) Output low voltage (VDD = 3.3V, IOL = 10mA) Output high voltage (VDD = 3.3V, IOH = -10mA) Static supply current
1
Parameter
Min
GND-0.3 2.0
Typ
Max
0.8 VDD+0.3 -35 35
Unit
V V A A mA mA
3 3 0.4 2.5 15 33 3.0 3.0 3.3 3.3 30 3.6 3.6 5
V V mA mA V V mS
Dynamic supply current ( VDD=3.3V, No Load) Operating Core Voltage Operating Output Buffer Voltage Power-up time (first locked cycle after power-up) Output impedance
2
Notes: 1. XIN / CLKIN pin is pulled to GND. 2. VDD and CLKIN inputs are stable.
Rev. 1 | Page 4 of 8 | www.onsemi.com
ASM3P2854C
AC Electrical Characteristics Symbol
XIN / CLKIN Input frequency At Pin 7 At Pin 8 FOUT Output frequency At Pins 9 and 10 At Pins 12 and 13 At Pin 15 At Pin 16 fd
2 tLH 2 1
Parameter
Min
Typ
24 48 12 33 66 PCLK 25 -0.5 1.0
Max
Unit
MHz
Frequency Deviation for Spread Spectrum Clocks Output rise time (measured from 20% to 80%) Output fall time (measured from 80% to 20%) Cycle to Cycle Jitter (For Modulated Clocks); unloaded outputs Period Jitter (For Non-Modulated Clocks) ); unloaded outputs Output duty cycle 45
% nS
tHL
1.0 300 pS 275 50 55 %
tJC tJP tD
Notes: 1. See the PCLK Selection Table for PCLK Frequency. 2. tLH and tHL are measured into a capacitive load of 15pF.
Cycle-Cycle Jitter
Period Jitter
Jitter=J1=t2-t1 Jitter =J2=t3-t2
Rev. 1 | Page 5 of 8 | www.onsemi.com
ASM3P2854C
Typical Crystal Specifications Fundamental AT cut parallel resonant crystal
Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance(CP) Shunt capacitance ESR 24MHz 50 ppm or better at 25 C -25 to +85 C C -40 to +85 C C 18pF 7pF maximum 25
Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
R
Crystal
Rx
CL
CL
CL = 2*(CP - CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc.
Rev. 1 | Page 6 of 8 | www.onsemi.com
ASM3P2854C
Package Information 16-lead Thin Shrunk Small Outline Package (4.40-MM Body)
8
1
PIN 1 ID E H
9
16
A
Seating Plane L C
e D
A1
B
Symbol Min
A A1 A2 B C D E e H L 0.020 0 0.002 0.031 0.007 0.004 0.193 0.169
Inches Max
0.043 0.006 0.041 0.012 0.008 0.201 0.177 0.026 BSC 0.252 BSC 0.030 8 0.50 0 0.05 0.80 0.19 0.09 4.90 4.30
D
Dimensions
A2
Millimeters Min Max
1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.65 BSC 6.40 BSC 0.75 8
Rev. 1 | Page 7 of 8 | www.onsemi.com
ASM3P2854C
Ordering Code Ordering Code
ASM3P2854CG-16TR
Marking
3P28 54C
Package Type
16-pin 4.4-mm TSSOP - TAPE & REEL, Green
Temperature
0 to +7 0 C C
A "microdot" placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free.
Licensed under U.S Patent #5,488,627 and #5,631,921.
Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative

▲Up To Search▲

Price & Availability of ASM3P2854C

	To Download ASM3P2854C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .